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F-Term-List

(Not Translated)
5F083 SEMICONDUCTOR MEMORIES
H01L27/10 -27/105,441;27/105,448-27/11597
H01L27/10-27/105,441;27/105,448-27/11597 AD AD00
DRAM 		AD01 AD02 AD03 AD04 AD06 AD10
. characterised by readout MOS transistors . . TFTs or thin-film transistors . . having channels in directions other than horizontal directions . . . Trench gate transistors with the gates embedded in trenches . . . Covering entire sides of projecting semiconductor columns with gate electrodes . . LDD or DDD structures
AD11 AD12 AD14 AD15 AD16 AD17 AD18 AD19 AD20
. Capacitors . . P-N junction capacitance types including Hi-C . . Planar types . . Trench types . . . Substrate storage node trench types . . . Substrate cell plates trench types . . . Stack trench types . . . merged with trench element isolation . . . One cell/one island types
AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30
. . Stack types . . . Radial fin types . . . . with plural radial fins . . . Crown cap-shaped or longitudinal types . . . . having plural longitudinal fins including projections . . . . having radial fins directed outwardly . . . . having radial fins directed inwardly . . . . having crown sidewalls directed downwardly . . . . having projections and recesses on crown sidewalls . . . . Tunnel structures or hollow structures
AD31
. . . using contact hole parts e.g. cuts in contact parts
AD42 AD43 AD45 AD46 AD48 AD49
. . . Thickening storage electrodes or increasing lateral areas . . . . Multilayering storage electrodes . . . using etching rate differences in plural interlayer insulating films . . . using etching rate differences in plural conductive films . . . Forming capacitors over bit lines (COBs) . . . Forming capacitors on planarised interlayer insulating films
AD51 AD52 AD53 AD54 AD55 AD56 AD57 AD60
. . characterised by plate electrodes . . . Applied voltages other than Vss Vcc or Vcc/2 . . . Wiring layers for supplying plate voltages . . . characterised by shapes of plate electrodes . . . . having plate electrodes divided into plural units . . . . Covering sides of lowermost storage electrodes . . . . Wrapping bottoms and sides of lowermost storage electrodes . . Multilayering capacitor dielectric films
AD61 AD62 AD63 AD69 AD70
. . Roughening . . . Forming grain boundaries in film-formation processes e.g. HSGs . . . Forming projections and recesses in etching processes . DRAMs other than 1 MOS transistor (Tr.) + 1 capacitor (Cap) types . . including active elements excluding MOS transistors (Tr.) in memory cells
BS BS00
SRAM OR STATIC RANDOM ACCESS MEMORY 		BS01 BS02 BS03 BS04 BS05 BS06 BS07 BS08 BS09 BS10
. Transfer transistors . . characterised by structures . . . of gates . . . of sources or drains . . . . of LDDs or Lightly Doped Drains . . characterised by processes (Additional classification is made in the places for processes) . . . of gates (Additional classification is made in the places for processes) . . . of sources or drains (Additional classification is made in the places for processes) . . . of dielectric films (Additional classification is made in the places for processes) . . characterised by materials (Additional classification is made in the places for materials)
BS11 BS12 BS13 BS14 BS15 BS16 BS17 BS18 BS19 BS20
. . . of gates see JA31-JA53 . . . of dielectric films . Drive transistors . . characterised by structures . . . of gates . . . of sources or drains . . . . LDDs or Lightly Doped Drains . . characterised by processes (Additional classification is made in the places for processes) . . . of gates (Additional classification is made in the places for processes) . . . of sources or drains (Additional classification is made in the places for processes)
BS21 BS22 BS23 BS24 BS25 BS26 BS27 BS28 BS29 BS30
. . . of dielectrics films (Additional classification is made in the places for processes) . . characterised by materials (Additional classification is made in the place for materials) . . . of gates see JA31-JA53 . . . of dielectrics films see JA01-JA20 . Load elements . . characterised by structures . . . PMOS transistors . . . . Diffusion layer gates . . . TFTs . . . . Top gate types
BS31 BS32 BS33 BS34 BS35 BS36 BS37 BS38 BS39 BS40
. . . . Double gate types or TFTs having plural gates . . . . Bottom gate types . . . . Offset gates . . . . . of implanting ions . . . . Channel structures . . . . . Particle size control . . . Resistive elements . . . Parasitic capacitances . . . Parasitic diodes . . characterised by processes (Additional classification is made in the places for processes)
BS41 BS42 BS43 BS44 BS45 BS46 BS47 BS48 BS49 BS50
. . . of load TFTs (Additional classification is made in the places for processes) . . . of load resistive elements (Additional classification is made in the places for processes) . . characterised by materials (Additional classification is made in the places for materials) . . . of load TFTs see JA31-JA53 . . . of load resistive elements see JA21-JA25 . Local wiring . . for connecting transfer transistors with drive transistors . . for connecting drive transistors with load elements . composed of elements other than MOS e.g. bipolar . The number of transistors forming cells is other than four or six
CR CR00
ROM, EXCLUDING EPROM OR EEPROM 		CR01 CR02 CR03 CR04
. Mask ROMs . . based on the presence or absence of ion implantation . . based on the presence or absence of wiring connections . . . having wiring connections forming diodes
CR11 CR12 CR13 CR14 CR15 CR16 CR17 CR18 CR20
. PROMs or Programmable ROMs . . Fuse ROMs . . P-N junction destructive type ROMs . . Insulating film destructive type ROMs . . Variable resistance value type ROMs . . Writing not depending on electrical means . . . by irradiating with laser beams . . . by irradiating with electron beams . Other ROMs
EP EP00
STRUCTURE OF EPROM OR EEPROM 		EP01 EP02 EP03 EP04 EP05 EP06 EP07 EP08 EP09
. Charge-storage mechanisms . . having FGs . . . characterised by structures . . . . Multilayer structures . . . . . composed of layers having different lengths . . . Impurity concentration . . . Grain sizes . . . Film thickness . . . having plural FGs
EP13 EP14 EP15 EP17 EP18
. . . characterised by arrangements . . . . Overlapping with drains . . . . Overlapping with sources . . Trap storage types . . . MNOS types including MONOS types
EP21 EP22 EP23 EP24 EP25 EP26 EP27 EP28 EP30
. Control mechanisms . . having CGs . . . Stack gates . . . Split gates . . . . having FG offset regions at drain sides . . . . having FG offset regions at source sides . . . having structures of CGs covering FGs . . . having plural CGs . . having gates other than CGs FGs or SGs
EP32 EP33 EP34 EP35 EP36 EP37 EP38 EP40
. . having SGs . . . Drain sides . . . Source sides . . . integral with memory cells . . . . using sidewalls . . . Overlapping with CGs . . . Overlapping with FGs . . Gates; channels; gate structures
EP41 EP42 EP43 EP44 EP45 EP47 EP48 EP49 EP50
. Insulating films . . Tunnel insulating films . . . characterised by structures e.g. multilayer structures . . . characterised by materials (Additional classification is made in the places for materials) . . . characterised by processes (Additional classification is made in the places for processes) . . Gate insulating films . . . characterised by structures . . . characterised by materials (Additional classification is made in the places for materials) . . . characterised by processes (Additional classification is made in the places for processes)
EP52 EP53 EP54 EP55 EP56 EP57 EP59 EP60
. . Insulating films between CGs and FGs . . . characterised by structures or multilayer structures . . . . two-layered . . . . three-layered . . . characterised by materials (Additional classification is made in the places for materials) . . . characterised by processes (Additional classification is made in the places for processes) . . Insulating films transmitting ultra-violet light . . having multilayered insulating films covering stacked gates excluding flattened films
EP61 EP62 EP63 EP64 EP65 EP67 EP68 EP69 EP70
. Diffusion regions . . characterised by drain regions . . . LDD structures . . . having reverse conductivity regions . . . in element isolation regions . . characterised by source regions . . . LDS structures . . . having reverse conductivity regions . . . in element isolation regions
EP72 EP75 EP76 EP77 EP78 EP79
. . characterised by tunnel diffusion regions . characterised by cell arrangements . . NAND types . . NOR types . . DINOR types . . AND types
ER ER00
METHOD OF WRITING OR ERASING OF EPROM OR EEPROM 		ER01 ER02 ER03 ER04 ER05 ER06 ER07 ER08 ER09 ER10
. Carrier control . . Electron injection . . . Tunnel injection . . . Avalanche injection . . . from drain sides . . . from source sides . . . from CGs . . . from gates other than CGs . . . from channels . . . from diffusion regions excluding sources or drains
ER11 ER13 ER14 ER15 ER16 ER17 ER18 ER19 ER20
. . Hole injection . . Electron ejection . . . Tunnel ejection . . . to drain sides . . . to source sides . . . to CGs . . . to gates other than CGs . . . to channels . . . to diffusion regions excluding sources or drains
ER21 ER22 ER23 ER25 ER27 ER29 ER30
. . Erasing electrically (EEPROMs) . . . Batch erasing or flash memories . . . Block erasing . . Erasing by ultra-violet light or EPROMs . . Systems applying pulses . . using negative voltages . . . using gate negative voltages
FR FR00
FERROELECTRIC MEMORY 		FR01 FR02 FR03 FR05 FR06 FR07 FR10
. having capacitors or destructive readout types . . 1Tr./1C types . . 2Tr./2C type . MFS types or non-destructive readout types . . MFIS types . . MFMIS types . Block structures
FZ FZ00
OTHER SEMICONDUCTOR MEMORY 		FZ01 FZ02 FZ03 FZ04 FZ05 FZ06 FZ07 FZ08 FZ10
. Single electronic memories . Memories or scanning probe microscopes (SPMs) . Charge transfer type memories . for optical integrated circuits including PHB memories . Bipolar memories . Pseudo SRAMs . Organic semiconductor memories . Superconducting memories . Other semiconductor memories
GA GA00
PURPOSE FOR IMPROVEMENT 		GA01 GA02 GA03 GA05 GA06 GA07 GA09 GA10
. Increasing speeds . . by reducing resistances . . by reducing parasitic capacitance . Saving electric power . . by reducing leakage currents . . . by increasing resistances only in SRAMs . Reducing areas . . by three-dimensional conversion
GA11 GA12 GA13 GA14 GA15 GA16 GA17 GA18 GA19
. Stabilising operations . . by reducing noises . . . by shielding . . Protective elements . . Preventing error writing . . Preventing erroneous erasing . . Preventing over-erasing . . Preventing soft errors . . Relieving local electric fields
GA21 GA22 GA23 GA24 GA25 GA27 GA28 GA29 GA30
. . Preventing deterioration in fatigue properties . . Increasing coupling ratios . . Preventing latch-up . . Increasing pressure-resistances . . Preventing impurities from mixing or diffusing . Improving manufacturing methods . . Reducing the number of processes . . Temperature lowering . Others
HA HA00
SUBSTRATE 		HA01 HA02 HA03 HA04 HA05 HA06 HA07 HA08 HA10
. Embedding layers . SOIs or Silicon On Insulators . Substrate bias circuits . . Bias generating parts . . Pumping parts . Compound semiconductor substrates . Epitaxial substrates . characterised by substrate orientation . Others
JA JA00
MATERIAL 		JA01 JA02 JA03 JA04 JA05 JA06 JA07
. Materials of capacitor insulating films or gate insulating films . . Oxide-based . . . Composite films including oxide films . . . . of silicon oxide films and silicon nitride films . . . Oxynitride films . . . Tantalum oxide films (Ta2O5) . . . Oxide films containing halogens
JA12 JA13 JA14 JA15 JA16 JA17 JA19 JA20
. . . Composite oxides . . . . ABO3 or perovskite types . . . . . Strontium titanate (SrTiO3) or barium or strontium titanate (Ba Sr)TiO3 . . . . . containing Pb e.g. PTO PZT PLT or PLZT-based . . . . Laminar compound dielectrics . . . . . Bismuth-based laminar compounds . . Silicon nitride films . . Halogen compound-based of non-oxides
JA21 JA22 JA23 JA24 JA25
. Load resistive materials . . Amorphous silicon (Si) . . Non-doped silicon (Si) . . Doped silicon (Si) . . . Resistance values varied depending on locations
JA31 JA32 JA33 JA34 JA35 JA36 JA37 JA38 JA39 JA40
. Materials of electrodes wiring or barriers . . Silicon (Si) . . . Amorphous silicon (Si) . . . Single crystal silicon (Si) . . Silicides . . Aluminium (Al) or aluminium-based alloys . . Copper (Cu) or copper-based alloys . . Platinum group atom gold (Au) or alloys thereof . . Refractory metals e.g. tungsten (W) molybdenum (Mo) tantalum (Ta) titanium (Ti) or nickel (Ni) or alloys thereof . . Metal nitrides
JA42 JA43 JA44 JA45 JA46 JA47
. . Oxide conductors . . . Oxides of platinum group elements e.g. PtOx or RuOx . . . Composites oxide materials . . . . ABO3 or perovskite types . . . . Laminar compounds . . . having conductivity by doping
JA51 JA53 JA55 JA56 JA57 JA58 JA60
. . Compound semiconductors e.g. groups III-V or groups II-VI . . Polycide or salicide structures . Interlayer insulating film materials . . Inorganic-based . . . SiOF . . Organic-based . characterised by materials or use thereof
KA KA00
WIRING OR MAINLY CROSS SECTION THEREOF 		KA01 KA02 KA03 KA05 KA06 KA07 KA08 KA10
. Word lines . . Back-reinforced . . Hierarchical types . Bit lines . . Hierarchical types . . Substrate-embedded types . . formed with diffusion layers . Forming adjacent wirings on separate wiring layers
KA11 KA12 KA13 KA14 KA15 KA16 KA17 KA18 KA19 KA20
. Source lines . . Hierarchical types . . Source lines of substrate-embedded types or source lines formed of diffusion layers . . . formed by self alignment . Power source lines . Earthing wires . Other wiring layers . . Address selection lines . . Plate lines . . Multilayered wiring excluding WL or BL
LA LA00
LAYOUT, CIRCUIT DESIGN OR MAINLY PLANE VIEW THEREOF 		LA01 LA02 LA03 LA04 LA05 LA06 LA07 LA08 LA09 LA10
. symmetric . between memory cell units . Sense amplifiers . Column decoders . Row decoders including word-line voltage boosting circuits . Address buffer circuits . Input or output buffer circuits . Substrate bias circuits . Precharge circuits . Auxiliary or control circuits
LA11 LA12 LA13 LA14 LA15 LA16 LA17 LA18 LA19 LA20
. Wiring layouts . . Bit lines . . . open . . . folded . . . twisted . . Word lines . . Power source lines . . Earthing wires . . Plate lines . . Source lines
LA21 LA25 LA26 LA27 LA28 LA29 LA30
. Contact-arrangement layouts . Chip layouts . . Auxiliary circuits arranged at chip four peripheral parts . . Auxiliary circuits arranged at chip three peripheral parts . . Auxiliary circuits arranged at chip two peripheral parts . . Auxiliary circuits arranged at centre parts . . Auxiliary circuits arranged cross-shaped
MA MA00
CONTACT 		MA01 MA02 MA03 MA04 MA05 MA06
. characterised by shapes of contacts . . Self aligned contacts . . . using gate sidewall insulating films . . having foundation layers . . having barrier layers in contact parts . . having plugs
MA15 MA16 MA17 MA18 MA19 MA20
. characterised by positions of contacts . . between plural wiring layers . . between diffusion layers and capacitor electrodes . . between wiring layers and capacitor electrodes . . between diffusion layers and wiring layers . . . Diffusion layers and bit lines
NA NA00
ELEMENT ISOLATION 		NA01 NA02 NA03 NA04 NA05 NA06 NA08 NA10
. by trench . characterised by LOCOS . characterised by separation of P-N junctions . Channel stopper regions . using field shield electrodes . Self-alignment formation of gates and element isolation regions . Interlayer insulating films . Other element isolation methods
PR PR00
PROCESS 		PR01 PR03 PR04 PR05 PR06 PR07 PR09 PR10
. Exposure e.g. phase shift mask X-ray exposure or electron beam exposure . Dry etching . Ion milling . Wet etching . using differences in etching rates . characterised by forming etching masks . using sidewall formation for microfabrication . . Sidewall materials being insulating films excluding gate sidewalls
PR12 PR13 PR14 PR15 PR16 PR18
. Thermal oxidation . . RTO . . using differences in oxidation rates . Thermal nitriding . . RTN . Hydrogenation
PR21 PR22 PR23 PR25 PR28 PR29
. CVD . PVD . Coating methods . Epitaxial growth . Positioning . . Self alignment
PR33 PR34 PR36 PR37 PR38 PR39 PR40
. Heat treatment . . RTA . Ion implantation . . oblique . Planarisation . . Etch back . . CMP
PR41 PR42 PR43 PR44 PR45 PR46 PR47 PR48 PR49
. Simultaneous forming memory cells and auxiliary circuits . . Memory cells not covered by the subdivisional places . . . Gates . . . Gate insulating films . . . Sources or drains . . . Wells . . . Upper electrodes for capacitors . . . Lower electrodes for capacitors . . . Insulating films between CGs and FGs
PR52 PR53 PR54 PR55 PR56 PR57
. . Auxiliary circuits not covered by the subdivisional places . . . Gates . . . Gate insulating films . . . Sources or drains . . . Wells . . . Resistances
ZA ZA00
OTHER 		ZA01 ZA02 ZA03 ZA04 ZA05 ZA06 ZA07 ZA08 ZA09 ZA10
. Relationships between memory cells and auxiliary circuits . . Recess structures . . having different element isolation structures . . having different MOSFET structures . . . having different gate structures . . . having different source or drain structures . . . having different gate insulating films . . having different operating voltages . Auxiliary circuits being bipolar elements . Redundant circuits
ZA11 ZA12 ZA13 ZA14 ZA15 ZA19 ZA20
. Memories and independent functional blocks . . Memory LSIs + (logic or analogue) . . Memories + CPUs or microcomputers . . Memory parts + memory parts (different types) . . Memories + (gate arrays or master slices) . Simulation . Testing measuring or inspecting
ZA21 ZA23 ZA24 ZA25 ZA27 ZA28 ZA29 ZA30
. Multi-value functions . Packages . . having windows or openings . . Lead-frames . Wafer-scale memories . Dummy cells or dummy wiring . Power source pads . Others
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