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This page displays all 「FI」 in main group H10B43/00. |
HB:Handbook | ||||
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CC:Concordance | |||||
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EEPROM devices comprising charge-trapping gate insulators [2023.01] | HB | CC | 5F083 | |
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. characterised by the top-view layout [2023.01] | HB | CC | 5F083 | |
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. characterised by three-dimensional arrangements, e.g. with cells on different height levels [2023.01] | HB | CC | 5F083 | |
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.. with source and drain on different levels, e.g. with sloping channels [2023.01] | HB | CC | 5F083 | |
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... the channels comprising vertical portions, e.g. U-shaped channels [2023.01] | HB | CC | 5F083 | |
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. characterised by the memory core region [2023.01] | HB | CC | 5F083 | |
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.. with cell select transistors, e.g. NAND [2023.01] | HB | CC | 5F083 | |
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. characterised by the peripheral circuit region [2023.01] | HB | CC | 5F083 | |
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. characterised by the boundary region between the core and peripheral circuit regions [2023.01] | HB | CC | 5F083 | |