F-Term-List

2G132 Tests of electronic circuits
G01R31/28 -31/3193
G01R31/28-31/30; G01R31/303; G01R31/304; G01R31/306; G01R31/307; G01R31/309; G01R31/311; G01R31/316; G01R31/3161; G01R31/3163; G01R31/3167; G01R31/317; G01R31/3173; G01R31/3177 AA AA00
TESTING OBJECTS
AA01 AA02 AA03 AA04 AA05 AA06 AA07 AA08 AA09
. Logic circuits . . PLA, PLD, gate array . . CPU, sequential circuits . . Counters, registers, flip-flops . . . Flip-flops for scanning . . Tri-state, bidirectional elements . . Multi-value (three values or more) logic circuits . . Memory circuits . . . ROM, nonvolatile memories, magnetic bubbles
AA11 AA12 AA13 AA14 AA15 AA17 AA18 AA20
. Analog and digital hybrid circuits (e.g. AD converters) . Analog circuits . ASIC . Multichip modules . Having functional blocks (macro cells) . Buffers . IC cards, or the like . Mounting boards
G01R31/28-31/30; G01R31/3161; G01R31/3163; G01R31/3173; G01R31/3177; G01R31/3181 AB AB00
TESTING CONTENTS
AB01 AB02 AB03 AB04 AB05 AB06 AB07 AB08 AB09 AB10
. Functional testing . . Operation analysis, analyzers . Screening, burn-in, aging . Marginal testing, life testing, reliability testing . . Operation margins . . . Voltage margins . . . Timing margins . . . Noise margins . . . . Electrostatic noises . . . . High frequency noises
AB11 AB12 AB13 AB14 AB15 AB16 AB17 AB18 AB20
. . Instantaneous cutoff, voltage sudden changes . . Withstand voltage . . Environment testing . . . Temperature . . . Humidity . . . Vibration, impulse, pressure . . . Dust . . . Radiation, Ultra-violet radiation . Monitoring (testing in operating states)
G01R31/28-31/30; G01R31/3193 AC AC00
TESTING PROCESSES
AC01 AC02 AC03 AC04 AC05 AC06 AC07 AC09 AC10
. Comparison with standard circuits . Comparison between bodies to be tested . Comparison with reference data . Comparison by compressed data . . Comparison of characteristic signals (signatures) . . Comparison by number of pulses . . Comparison by analog values, multi level values . Simulation . . Analyzing output from actual circuits
AC11 AC12 AC14 AC15 AC16 AC17
. . For circuit designs . . Hardware simulation, simulation circuits . Scan-in, scan-out, scan-pass, LSSD . . Boundary scanning (boundary scanning testing) . . . Combined use with internal scanning . . Partial scanning
G01R31/28-31/30 AD AD00
TESTING ITEMS
AD01 AD02 AD03 AD04 AD05 AD06 AD07 AD08 AD10
. Voltage, current, power . Parametric characteristics . Impedances . Frequencies, phases . Logic value (HL) voltage . Logic pattern coincidence . Delay time, timing . . Using ring oscillators . Waveforms, pulse widths
AD15 AD18
. Discontinuities, short circuits, wiring states . Heat detection
G01R31/28-31/30; G01R31/3177; G01R31/319 AE AE00
TESTING ARRANGEMENTS (EXCEPT FOR TESTING HEADS)
AE01 AE02 AE03 AE04 AE06 AE08 AE10
. Devices for transporting the bodies to be tested . Devices for fixing the bodies to be tested . . Fixing by pneumatic pressure, vacuum . . Positioning of circuit boards, position detection . Waveform formation circuits (formatters) . Drivers, sensor circuits . Connection circuits to input-output terminals
AE11 AE12 AE14 AE16 AE18 AE19
. Signal switching means . . Relay matrix arrays . Comparison and discrimination circuits . Display . Records . . Fail memories
AE21 AE22 AE23 AE24 AE25 AE26 AE27 AE29 AE30
. Circuits for achieving environments at actual use . Control circuits . . Controls by programs . . Batch controls of plural testing arrangements (host systems) . Relay members to testing heads . Protection circuits . Power supplies . Small checkers, logic checkers . In-circuit testers
G01R31/28-31/30; G01R31/302-31/315 AF AF00
TESTING HEADS
AF01 AF02 AF03 AF04 AF05 AF06 AF07 AF08 AF10
. Probes . . Having plural probes . . For arrangement of probes . . . Methods for determining mounting position of probes . . . For corresponding to multiple models of the bodies to be tested . . Controls of relative positions of probes and the bodies to be tested . . . Controls in vertical directions (e.g. contact pressure, contact detection) . . Applying vibration, rotation . . Probing adapters (e.g. conversion)
AF11 AF12 AF13 AF14 AF15 AF16 AF18 AF20
. . Contactless probes . . . Using particle radiation (e.g. ion beams) . . . Using electron beams (EB) . . . Using lasers, light . . . . Using electro-optical elements . . . By magnetic induction, electrostatic induction . Pin electronics (e.g. probe change) . Heating, cooling of probes
G01R31/28-31/30; G01R31/3183 AG AG00
FOR APPLICATION OF SIGNALS
AG01 AG02 AG03 AG04 AG05 AG06 AG08 AG09
. Generation of testing signals . . Generation by reading memory contents . . Generation by operation . . Processing and outputting of read-out data . . Generation of random signals . . Generation of multiple signals in one cycle . Clock pulses, timing signals . Forcible application of signals
AG11 AG12 AG13 AG14 AG15
. Preparation of testing data . . Preparation of testing patterns for scanning . . Preparation using editors, indication circuits . . Using simulation technology . . . Using circuit design data (specifications)
G01R31/28-31/30 AH AH00
FOR DETECTING SIGNALS
AH01 AH02 AH03 AH04 AH05 AH07
. Holding of signals . Processing of signals . Identifying specific signals . Latch signals . Strobe signals . Controls by detection signals
AJ AJ00
AUXILIARY DEVICES
AJ01 AJ02 AJ03 AJ04 AJ05 AJ06 AJ07 AJ08
. Extension boards . . Having active elements . . Switches, switches with indicators . . Having features of mechanical structures . Inspection adapters . Templates . Clips, sockets . . Clips for IC
G01R31/28-31/30; G01R31/3185; G01R31/3187 AK AK00
STRUCTURES OF THE BODIES TO BE TESTED FOR TESTING
AK01 AK02 AK03 AK04 AK05 AK07 AK08 AK09 AK10
. Shapes of IC, structures of terminals of IC . Check terminal connectors . Circuit boards . . Print patterns . Casing structures . Circuit arrangements for testing . . Using exclusive OR . . Using comparison and discrimination circuits . . For pull-up, pull-down
AK11 AK12 AK13 AK14 AK15 AK16 AK17 AK18 AK19 AK20
. . For dividing, separating circuits . . For initialization, synchronization . . CPU for controlling testing operations, logic operation circuits . . . For scanning . . Switching circuits to testing modes . . . Switching by voltage other than normal voltage . . . Using shift registers . . . Using counters . . . Using AD-conversion circuits . . . Using decoders
AK21 AK22 AK23 AK24 AK25 AK26 AK27 AK29
. . . Using delay circuits . . Input and output circuits for testing . . . Scan-in, scan-out, pass circuits . . . . Internal circuit arrangements of FF for scanning being described . . . . . Components being transfer gates, FET . . . . Designs of scan pass built-in circuits . . . . Structures for adjusting clock timings . . Self-diagnosis (e.g. BIST)
G01R31/28-31/30 AL AL00
PURPOSE, OTHERS
AL01 AL02 AL03 AL04 AL05 AL06 AL07 AL09 AL10
. Identification of the bodies to be tested, detection of existence . . By electronic means . Ensuring of connection . Confirmation of connection, detection of incorrect connection . A decrease in the number of connection wires (decrease of the number of terminals) . Correspondence to multiple models (having multiple purposes) . . Changing testing programs by models, testing items. . Shortening of testing time . . Finishing only by simplified testing
AL11 AL12 AL13 AL14 AL15 AL16 AL18 AL19 AL20
. Improvement in testing accuracy . Specification of failure parts, causes, or the like . Adjustment of testing arrangements . . Initial setting (except for calibration) . . Calibration . . Adjustment of timings (e.g. skews) . Impedance matching . . Earthing . . Using terminal resistances
AL21 AL22 AL24 AL25 AL26 AL29
. Temperature controls . . Cooling of testing arrangements . Level conversion . Testing of plural bodies to be tested . . Parallel testing . Testing bodies to be tested under connecting with bus bars (e.g. bus)
AL31 AL32 AL33 AL35 AL38 AL40
. Processing at abnormalities, protection . Testing high functional elements with low functional devices . . Devices, circuits for supporting testing arrangements . Improving arrangements of components for testing arrangements . Performance testing of testing arrangements . General as testing processes
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