F-Term-List

H04L7/00-7/10

AA00
PURPOSE OR EFFECT

AA01

AA02

AA03

AA04

AA05

AA06

AA07

AA08

AA09

AA10

. Improving synchronisation quality

. . Reduction in time for establishing synchronisation

. . Maintaining synchronisation with high accuracy

. . Preventing pseudo-synchronisation pull-in

. . Increasing timing quality

. . . Phase jitter absorption

. . . Compensation for transmission delay change based on length of the cable

. . . Skew correction

. . . Clock-supply even during periods of no signal

. . . . Compensation for missing input-signal pulses

AA11

AA12

AA13

AA15

AA16

AA18

. Improving reliability

. . Preventing malfunctions

. . Reducing noise influence

. Structural simplification

. . Reducing circuit scale

. Time setting

BB00
TRANSMISSION PATH STRUCTURE

BB01

BB02

BB04

BB05

BB06

. Radio transmission excluding satellite communication or broadcast-communication devices

. Light

. Parallel transmission paths

. Two-way communication

. Transmission paths combined with power supply

BB11

BB12

BB13

BB14

BB15

BB16

BB17

BB18

. Switching networks

. . Buses or multidrops

. . Loops or rings

. . 1: N star networks

. . Packet networks

. . Asynchronous Transfer Mode (ATM) networks

. . Integrated services digital networks (ISDN)

. . Switched connection at higher order groups

CC00
TRANSMISSION OR RECORDING MODE

CC01

CC02

CC03

CC04

CC05

CC06

CC07

CC08

CC09

. Multiplex transmissions

. . Time division multiplexing transmissions

. . . Systems having no address

. . . . Envelope systems

. . . Address assignment systems

. . . . Time division multiplex accesses (TDMAs)

. . . . Cyclic digital transmissions (CDTs)

. Broadcast communication

. . Teletext

CC11

CC12

. Recording

. . Magnetic recording

DD00
INFORMATION SOURCE

DD01

DD02

DD03

. Voices

. Pictures

. Remote control remote supervisory control or instrumentation information

EE00
DIGITAL MODULATION SYSTEM (DESCRIBED IN CLAIMS ONLY)

EE01

EE02

EE03

EE04

. Frequency shift keying (FSK) or minimum shift keying (MSK)

. Phase shift keying (PSK)

. Amplitude shift keying (ASK)

. Amplitude phase-shift keying (APSK) or quadrature amplitude modulation (QAM)

FF00
TRANSMISSION PATH CODE (DESCRIBED IN CLAIMS ONLY)

FF01

FF02

FF03

FF04

FF05

FF06

FF07

FF09

. Return-to-zero (RZ)

. Non-return-to-zero (NRZ)

. Non-return-to-zero inverted (NRZI)

. Biphase

. . Manchester or biphase level

. . Coded mark inversion (CMI)

. . Differential mark inversion (DMI) or biphase marks or spaces

. Modified frequency modulation (MFM) or delta modulation (DM)

FF11

FF12

FF13

FF14

FF16

FF17

FF18

. Multiple values

. . Alternate mark inversion (AMI) or bipolar

. . Bipolar with n-zero substitution (BnZS)

. . HDBn

. nB1C codes

. mB-nB codes

. Partial-response

GG00
NETWORK, CLOCK, OR BIT SYNCHRONISATION

GG01

GG02

GG03

GG04

GG05

GG06

GG07

GG08

GG09

GG10

. Clock transmission

. . Clock generation or supply

. . . Supply by other lines correspond to transmission signals

. . . . Superimposed transmission of other synchronising signals

. . . . Supply of clock from receiving side

. . Clock reception

. . . Clock selection or switching

. . . Clock regeneration from transmission clocks

. . . . Clock phase adjustments

. . . . Clock frequency synchronisation

GG11

GG12

GG13

GG14

GG15

GG16

. . . Timing extraction from received signals

. . . . Objects to be extracted

. . . . . Particular codes

. . . . . . Superimposed transmission of clock signals

. . . . . . Alternate clock and data transmissions

. . . . . Specific code pattern combinations

GG22

GG23

GG24

GG25

GG26

GG27

GG28

GG29

. . . . Extraction means or principles

. . . . . Using singular points of received signal *

. . . . . . Rise or fall points

. . . . . . Zero cross points

. . . . . . Peak points

. . . . . Using received signal spectra

. . . . . Using high frequency clocks

. . . . . . Selected from among multi-phase clocks

GG32

GG33

GG34

GG35

GG36

GG37

GG38

. . . . Means to ensure extraction

. . . . . Scramble

. . . . . . Generation of PN (pseudo-random) signals

. . . . . . Two or more bit parallel processing

. . . . . Descramblers

. . . . . . Descrambler synchronisation

. . . . . . Two or more bit parallel processing

GG41

GG42

GG43

GG44

GG45

GG46

GG47

GG48

GG49

. Signal phase adjustments

. . Transfers to other clocks of the same velocity

. . . Synchronisation for intra-office reference phases

. . . . Frame phase synchronisation

. . . . Clock phase synchronisation

. . . . using pulse stuffing

. . . . . Stuffing control

. . . . . Destuffing control

. . . . . Transmission pulse of stuffing specification or control

GG52

GG53

GG54

GG56

GG57

GG58

. . . Memory control

. . . . Slip control

. . . . Parallel processing

. Slave synchronisation

. Mutual synchronisation

. Independent synchronisation

HH00
FRAME OR BLOCK SYNCHRONISATION

HH01

HH02

HH03

HH04

. Frame synchronisation

. Multi-frame synchronisation

. Block synchronisation

. . Channel synchronisation

HH11

HH12

HH13

HH14

HH15

HH17

HH18

. synchronisation establishment or lead-in

. . synchronisation pattern detection

. . . 1-bit shifting systems

. . . Parallel processing

. . . Correlation detection

. . synchronisation established in cooperation with transmission and reception

. . . Informing remote devices of the establishment of synchronisation

HH21

HH22

HH23

HH24

HH25

. Synchronisation protection

. . Forward protection

. . Backward protection

. . Analogue integration type protection

. . Digital integration type protection

HH31

HH32

HH33

HH34

HH36

HH37

HH38

HH39

. synchronised signal structures

. . Modifications or additions to the synchronisation signal corresponding to state

. . . During non-communication

. . . During pull-out

. . by violations

. . . Different amplitudes

. . . Different pulse widths

. . . Different polarities

HH42

HH43

HH44

HH45

. . Specific code combination patterns

. . . Convergence synchronisation codes

. . . . Unique words

. . . Dispersion synchronisation codes

HH52

HH53

HH54

HH55

HH56

HH57

HH58

HH59

HH60

. . Use of other signals or codes *

. . . Preamble signals

. . . Header signals

. . . Control signals

. . . Strobe signals

. . . Error detecting codes

. . . Use of special conditions

. . . . Non-signal conditions

. . . Commercial power supplies

JJ00
OTHER SYNCHRONISATIONS

JJ01

JJ02

JJ03

JJ04

JJ06

JJ07

JJ08

JJ09

. synchronisation of non-continuous signals

. . Burst signal synchronisation

. . Asynchronisation

. . . Start-bit detection

. Initial synchronisation

. . Pull in during power turn-on

. . Transmission starting time or timing adjustments

. . transmitting training signal

KK00
SUPERVISION OR TESTING

KK01

KK02

KK03

KK04

KK05

. Articles to be supervised or tested *

. . Detection or measurement of phase jitters

. . Detection of abnormal state

. . . Detection of step-out of synchronisation

. . . Detection of clock-off or signal disconnection

KK11

KK12

KK13

KK15

KK16

KK17

KK18

KK19

. Targets of supervision or testing

. . Synchronous circuits

. . Lines

. Measures taken during detection of abnormalities

. . Holding of the preceding cycles or phases

. . Informing of remote devices

. . Switching from active devices to spare devices

. . . being synchronised in advance

LL00
COMMUNICATION CONTROL

LL01

LL02

LL03

LL04

LL05

LL06

LL08

LL09

LL10

. Velocity conversions

. . Asynchronisation-synchronisation signal conversions

. . . Non-continuous-continuous signal conversions

. . P/S conversions

. . S/P conversions

. . Multiple conversions

. Setting and modifications of communication systems

. . Detection of data or clock speed

. . Setting and modification of data or clock speed

LL11

LL12

LL13

LL14

LL15

. Transmission control procedures

. . Basic transmission control procedures

. . High level transmission control procedures (HDLCs)

. Flow controls

. Error controls

MM00
DEVICE, CIRCUIT, OR FUNCTION (DESCRIBED IN CLAIMS ONLY)

MM01

MM02

MM03

MM05

. Devices *

. . Transmitters

. . . Modulation or coding

. . Repeaters

MM11

MM12

MM13

MM14

MM15

MM16

MM18

MM19

. . Receivers

. . . Demodulation or decoding

. . . . Carrier regeneration or synchronisation

. . . . Error correction code decoding

. . . . . Convoluted codes

. . . . . Punctured codes

. . Modems

. . Circuit termination equipment

MM21

MM22

MM23

MM24

MM25

MM26

MM27

MM28

MM29

. Basic components *

. . Transistors or field effect transistors (FETs)

. . Central processing units (CPUs) or microprocessors units (MPUs)

. . Memories or buffer memories

. . . Elastic memories

. . . FIFO (First-In First-Out) memories

. . . Shift registers

. . . Flip-flop

. . . Read only memories (ROMs)

MM31

MM32

MM33

MM34

MM35

MM36

MM37

MM38

MM39

MM40

. Basic circuits or functions *

. . Resonators or tank circuits

. . Filters

. . Differentiating circuits

. . Integrating circuits

. . Delay circuits and elements

. . Slicers or limiters

. . Samples or sample-and-hold circuits

. . Wave rectification circuits

. . Frequency multiplication circuits

MM42

MM43

MM44

MM45

MM46

MM47

MM48

MM49

MM50

. . Polarity discrimination circuits

. . Waveform shaping circuits

. . Digital-to-analogue (D/A) conversion circuits

. . Analogue-to-digital (A/D) conversion circuits

. . Phase-locked loops (PLLs)

. . . Multiple phase-locked loops (PLLs)

. . . Digital phase-locked loops (DPLLs)

. . Oscillators

. . . Voltage-controlled oscillators (VCOs) or variable-frequency oscillators (VFOs)

MM52

MM53

MM54

MM55

MM56

MM57

MM58

MM59

MM60

. . Pulse circuits

. . . Logic gates

. . . Majority circuits

. . . Dividing circuits

. . . Counters

. . . . Multiple or competitive counters

. . . . Reversible counters

. . Phase shift circuits

. . Phase detection circuits

MM62

MM63

MM64

. . Comparator circuits

. . . Phase comparator circuits

. . Power supplies

5K047	SYNCHRONISATION IN DIGITAL TRANSMISSION SYSTEMS
	H04L7/00 -7/10