F-Term-List

G06F30/00-30/398; 111/00-119/22

AA00
APPLICATIONS

AA01

AA02

AA03

AA04

AA05

AA06

AA07

AA08

AA09

AA10

. Public facilities (water supply or electric line)

. Plants

. Piping or fluid circuits

. Buildings or fixtures (construction)

. Transport machinery (vehicles, marine vessels, or aircraft)

. Jigs for machining (dies, sheet metal, etc.)

. Assemblies

. Containers

. Optics

. Materials

AA11

AA12

AA14

AA15

AA16

AA17

. Fabrics, clothing, accessories (eyeglasses, etc.)

. Patterns

. Networks

. Systems

. Procedures

. . Working plan or production process

AA21

AA22

AA23

AA24

AA25

. Electric devices (facilities or products)

. . Electronic or semi-conductor devices (PB, IC, LSI, etc.)

. . . Circuits including analog circuit

. . . Circuits including memory

. . Sequence circuits

BA00
CONFIGURATIONS OF CAD DEVICES

BA01

BA02

BA03

BA04

. Network types (client-server)

. Stand-alone types (personal computer CAD)

. Combinations of CAD devices and other devices

. . Combinations with manufacturing facilities

CA00
SPECIAL DIAGRAMS

CA01

CA02

CA03

CA04

. Maps, tables or graphs

. Pattern pieces (pattern paper)

. Variable, signal transmission diagram

. State transition diagrams, flow charts, or PAD diagrams

DA00
DESIGN DATA INPUT IN GENERAL

DA01

DA02

DA03

DA04

DA05

DA06

DA07

. Input of characters, numbers, etc.

. . Input of dimensions

. Input of diagrams

. . Using position-coordinate conversion means (digitizers)

. . Photographic diagram input

. . . Automatic reading of diagrams

. . . . Recognition of graphics

DC00
DESIGN PROCESSING IN GENERAL

DC01

DC02

DC03

DC04

DC05

DC06

. Design techniques in general

. . Hierarchical design

. . Using AI or inference, etc.

. . Optimization

. Input or display of design restrictions, design standards, or design specifications

. Characterized by correction processing of design results

DE00
DESIGN RESULT OUTPUT IN GENERAL

DE01

DE02

DE03

DE04

DE05

DE06

. Characterized by formats of output data

. . Conversion of output data

. Creation and output of diagrams

. . Processing of characters (excluding dimension)

. . Processing of dimensions, dimension tolerances, dimension lines, or dimension auxiliary lines

. Simulated display of design results (for presentation)

DE11

DE12

DE13

DE14

DE15

DE16

. Output of design-related data

. . Manufacturing-related data (manufacturing procedures, inspection data)

. . Quantity of parts or parts lists

. . Assembling diagrams

. . Manuals or documents

. . Calculation of costs or estimates

DG00
OPERATOR ASSISTANCE IN GENERAL

DG01

DG02

DG03

DG04

DG05

DG06

DG07

. Interactive input

. . Instructions, menus, or templates

. Display assistance

. . Multiple windows

. . Auxiliary pattern display

. . . Grid lines

. . Emphasized display (blinking, frames, or color)

DJ00
EVALUATION OR INSPECTION OF DESIGN RESULTS IN GENERAL

DJ01

DJ02

DJ03

DJ04

DJ05

DJ07

DJ08

. Analysis of characteristics in general

. . Structural analysis

. . Fluid analysis

. . Electromagnetic field analysis

. . Motion analysis

. By finite element methods

. . Characterized by generation of finite elements

DJ11

DJ12

DJ14

DJ15

. By simulation

. Simulated display of shapes when worn by wearers

. Output or display of inspection results

. . Output of violation sections or causes

DL00
MANAGEMENT OF CAD RELATED DATA IN GENERAL

DL01

DL02

DL03

DL04

DL05

DL06

DL07

DL08

DL09

DL10

. Management of element data for design

. . Libraries

. Management of design deliverables

. . Management of CAD drawings

. . . Cataloging or updating

. . . Drawing check, approval

. . . Management of histories or corrections

. Databases

. Data structures

. . Hierarchical form (tree form)

EA00
INPUT OR DESIGN PROCESSING OF SHAPES

EA01

EA02

EA03

EA06

EA07

EA08

EA09

EA10

. Input of shapes

. . Shape input by measuring actual models

. . Input by orthographic drawings (three-view diagrams)

. Operations of shapes

. . Modifying, enlarging/reducing, rotating, or moving

. . Separating or synthesizing (combining) graphics

. . Logical operations, detection of crossing or superposition

. . Cutting, deleting or picking out

EA11

EA12

EA13

EA14

EA15

EA16

EA17

EA18

. Definitions of shapes or modeling

. . Using shape primitives

. . Descriptions and creation of curves

. . Creation of fillet surfaces, rounded portions, corners, etc.

. . Definition of three-dimensional shapes or modeling

. . . Using solid primitives (CSG)

. . . Descriptions and creation of curved surfaces

. . . Using finite elements (descriptions of partial curved surfaces, etc.)

EC00
OUTPUT OR INSPECTION OF SHAPE DESIGN RESULTS

EC01

EC02

EC03

EC04

EC05

EC06

EC08

EC09

EC10

. Output

. . Output of orthographic drawings (six-view diagrams, three-view diagrams)

. . Output of development diagrams

. . Image output of three-dimensional shapes

. . . Perspective views

. . . Display by solid visual displays or HMDs

. Inspection

. . Geometrical checking

. . . Interference checking

FA00
LAYOUT DESIGN

FA01

FA02

FA03

FA04

FA05

. Optimized cutting of materials

. Design or floor layout of equipment, etc., in buildings

. Printed matters

. . Forms

. Layout design using maps (water service, etc.)

GA00
FUNCTIONAL OR ABSTRACT DESIGN OF ELECTRIC OR ELECTRONIC CIRCUITS

GA01

GA02

GA03

GA04

GA05

GA06

GA07

. Characterized by description methods (HDL, etc.)

. High level synthesis or behavioral synthesis

. Optimization of logic

. Hierarchical design

. Using designed blocks or macros (IP)

. Design of special function circuits (processors or buses, etc.)

. Design of failure detection circuits (scan path, etc.)

GC00
SPECIFIC DESIGN OF ELECTRIC OR ELECTRONIC CIRCUITS

GC01

GC02

GC03

GC04

GC05

. Circuit design using concrete elements (logical design)

. . Specifying devices (FPGA, etc.)

. . Transfer of technology or logic synthesis

. . Considering delays or operation timing

. . Considering fan-in or fan-out

GC11

GC12

GC13

GC14

GC15

GC16

GC17

GC18

GC19

GC20

. Design of circuit implementation (physical design)

. . Layout of elements or cells (floor plan)

. . . Layout compaction

. . . Interactive layout processing

. . Wiring design

. . . Wiring route searching

. . . Wiring in directions other than vertical and lateral directions

. . . Processing specific to multi-layer wiring

. . . . Processing of through-holes or vias

. . . Specific wiring (power supplies, clocks, or bundled wires, etc.

GC22

GC23

GC24

GC25

GC26

GC27

. . Design of subdivided areas

. . Pattern design

. . . Specific patterns (power supplies or clocks, etc.)

. . Considering calorific values or power consumption

. . Considering delays or operation timing

. . Considering noise or crosstalk

GE00
CREATION OF CIRCUIT DIAGRAMS

GE01

GE02

GE03

GE04

GE05

GE07

GE08

GE09

. Input of circuit diagram data

. Layout of symbols

. Connection between symbols

. Processing of specific connection lines (power supplies, clocks, etc.)

. Creation of subdivided diagrams

. Output of circuit diagrams

. Creation of circuit diagrams of specific function

. Addition or arrangement of characters (signal names, etc.)

GG00
INSPECTION OF CIRCUIT DESIGN IN GENERAL

GG01

GG02

GG03

GG04

GG05

GG06

GG07

GG08

GG09

GG10

. Inspection of delays or operation timing

. . Analysis or calculation of delay time

. . . Static timing analysis

. . . By logical simulation

. . . By circuit simulation

. . Characterized by delay models

. . . Extraction delay information from implementation information

. . . Generation of delay information by circuit simulation

. . . Considering rounding of input waveforms

. . . Considering delay variability (statistical timing analysis)

GG12

GG13

GG14

. . Detection of timing error

. . . Addition of primitives for timing check

. . . Considering clock skew

GG21

GG22

GG23

GG24

. Versatile circuit design inspection techniques

. . By simulation

. . Characterized by configurations of inspection devices

. . Simulation of analog circuits

GJ00
INSPECTION OF LOGIC CIRCUIT DESIGN

GJ01

GJ02

GJ03

GJ04

GJ05

GJ06

GJ07

GJ08

GJ09

. Inspection of specific functional circuits (processors, etc.)

. . Inspection of circuits including memories

. . Inspection of failure detection circuits

. Collation or identity (equivalence) checking of logic circuits

. Using simulation

. . Generation of simulation models

. . Segmented simulation or parallel simulation

. . Emulation using FPGA, etc.

. . Simulation using real chips

GL00
INSPECTION OF IMPLEMENTATION DESIGN OF CIRCUITS

GL01

GL02

GL03

GL04

GL05

GL06

GL07

GL08

GL09

GL10

. Collation between implementation data and circuits or LVS verification

. . Recognition of elements, e.g., transistors

. . Recognition of logic gates

. Extraction of parasitic resistance or capacitance, etc.

. With geometrical shapes or DRC

. Inspection of alignment between multi-layer patterns

. Inspection specific to printed boards

. Inspection specific to integrated circuits

. Evaluation of calorific values or power consumption

. Inspection of noise or crosstalk

GL11

GL12

. Evaluation of circuit scale or area

. Inspection of deterioration (migration, etc.)

GN00
GENERATION OF DATA FOR INSPECTION OF CIRCUITS

GN01

GN02

GN03

GN04

. Failure simulation

. Generation of test patters or expected values

. . Automatic generation of test patterns or expected values

. . Test pattern generation for HDL description, etc.

GQ00
OUTPUT OF RESULTS OF CIRCUIT INSPECTION

GQ01

GQ02

GQ03

GQ04

GQ05

GQ06

GQ07

. Output of error sections

. Comparison between output values and expected values or specifications

. Calculation of test coverage

. Output of delay information

. Display of state of circuits or signal values

. . Display of waveforms or time charts

. . Superimposition on circuits

5B146	CAD
	G06F30/00 -30/398;111:00-119:22