F-Term-List

5F101 Non-volatile memory
H10D30/01 ,501;30/68-30/69
H01L29/78,371 BA BA00
ELECTRIC CHARGE ACCUMULATION MECHANISM
BA01 BA02 BA03 BA04 BA05 BA06 BA07 BA08
. FG types . . Arrangement of FG . . . Overlapping with SD, see BB13 . . . Partial overlapping on CH, see BB04 . . . On fields . . . Overlapping with other gates . . . . Overlapping with CG . . . . Injection gates (erasing and writing gates)
BA12 BA13 BA14 BA15 BA16 BA17 BA18 BA19
. . Shape and structure of FG . . . Embedded FG/grooves, see BD30 . . . CG side wall, see BH14 . . . Protrusions of FG, see BC03 . . . Multiple FG (In a single memory cell) . . . FG connection . . . PN junctions (In FG) . . FG materials (Excluding polycrystals)
BA22 BA23 BA24 BA26 BA27 BA28 BA29
. . FG peripheral insulation films . . . Insulation film thickness . . . . Partial making of thin film, see BA33-7 . . . Insulation film material, see BA33-BA37 . . . . Silicon-rich SiO2 film, see BA33-BA37 . . . . Impurity doping, see BA33-BA37 . . . . Containing nitride film, see BA33-BA37
BA33 BA34 BA35 BA36 BA37 BA40
. . . Thin film making or characteristic sections of insulation film materials . . . . Between SD and FG . . . . Between CH and FG . . . . Between CG and FG . . . . Between injection gates and FG . . Using superconductors
BA41 BA42 BA43 BA44 BA45 BA46 BA47 BA48 BA49
. Trap accumulation types . . Insulation film materials* . . . Single-layered insulation films . . . . Oxide films, refer to BH10 . . . Including nitride films* . . . . MNOS types . . . Containing alumina* . . . Containing impurities, see BH10 . . . Band gaps and inclined structures
BA52 BA53 BA54
. . Trap levels, see BB04 . . Insulation film thickness . . Clusters
BA61 BA62 BA63 BA64 BA65 BA66 BA68
. Other memory operations* . . Ferroelectrics . . Amorphous . . Electron gases and hetero junctions, see BD40 . . Semi-insulating material, see BD40 . . Superlattices, see BD40 . . Magnetic substances
BB BB00
CONTROL
BB01 BB02 BB03 BB04 BB05 BB06 BB08 BB09 BB10
. Control devices . . With CG . . . Multiple gates (Except FG) . . . Offset gates, see BD22 . . . Stacked gates (Identical end parts), see BH19 . . . Diffusion control regions . . CG materials (Other than polycrystals) . . Injection gates, erasing and writing gates . . . Injection gate arrangement
BB12 BB13 BB15 BB17 BB20
. . Without control gates . . . Control by capacitance between SD and FG . . Control by CH and wells . Capacitance analysis . Others*
BC BC00
ELECTRIC CHARGE INJECTIONS
BC01 BC02 BC03 BC04 BC05 BC06 BC07 BC08 BC09 BC10
. Tunnel injections . . Fowler Nordheim Tunnel injection . . Protrusions and electric field concentration, see BA15 . Avalanche injections . . Source drain junction breakdown . Formation of high impurity concentration parts (of electric charge injection parts) . Injection area formation . . PN diodes . . Poly-diodes . . Injector, see BA26 and thereafter
BC11 BC12 BC13 BC17 BC18 BC20
. Channel injection . . Inhomogeneous electric fields, see BA01 and thereafter . . Carrier moving directions and elevated sections, see BD13 . Optical writing, see BE08 . Electron beam writing . Others*
BD BD00
ELEMENT STRUCTURES
BD01 BD02 BD03 BD04 BD05 BD06 BD07 BD09 BD10
. Memory cell (sensor) . . MOS transistors . . . SD regions . . . . Flat-shaped S/D . . . . Cross-sectional S/D . . . . S/D depth . . . . High voltage resistant structures, such as LDD (of memory cells), see BD27 . . . . Impurity doping and distribution of impurity concentration (of SD) . . . . Shared or switching source drains
BD12 BD13 BD14 BD15 BD16 BD17 BD18 BD19 BD20
. . . Channel regions . . . . Channel shapes . . . . Channel doping, see BF01 . . . . . Partial channel doping, see BF01 . . . Vertical MOS . . Sensors other than MOS transistors . . . Bipolar transistors . . . CCD . . . Capacity and capacitors
BD21 BD22 BD23 BD24 BD25 BD26 BD27 BD29 BD30
. Combinations . . Address gate transistors, see BB04 . . Transistors for writing and erasing . . CMOS structures . . BiCMOS structures . . EDMOS . . High voltage resistant transistors (of peripheral circuits), see BD07 . SOS . SOI, thin film transistors, and three-dimensional elements
BD31 BD32 BD33 BD34 BD35 BD36 BD37 BD38 BD39 BD40
. Array . . Dense array structures . Cell arrangement and cell structures . . AND gate and NAND gate structures . Separation . . Well . . LOCOS . . Guard rings, parasitic channel prevention and diffusion . Substrate materials . . Group 3-5
BD41 BD42 BD43 BD44 BD45 BD46 BD47 BD50
. Surface protection films . . Transparent films . . Shielding films . . PSG . . Nitride films . . Metal films . . Shield . Others
BE BE00
PERIPHERAL TECHNOLOGY
BE01 BE02 BE03 BE05 BE06 BE07 BE08 BE10
. Address circuits and decode circuits . Read circuits and read methods . . Dynamic read . Write circuits and write methods . Erasing . . Electric erasing and erasing circuits . . Optical erasing, see BC17 . Containers
BE11 BE12 BE13 BE14 BE17 BE20
. Power source circuits . . Unipolar power sources . . Single power sources . . Boosting and booster circuits . Protection . Others*
BF BF00
OPERATION
BF01 BF02 BF03 BF05 BF07 BF08 BF09 BF10
. Properties, hysteresis and threshold value . . Memory retention . . Rewriting frequency for preventing deterioration . Multi-bit memory . Parasitic . . Parasitic capacity . . Leak and short-circuit prevention, see BD38 . Others*
BG BG00
APPLICATION
BG01 BG02 BG03 BG04 BG07 BG08 BG09 BG10
. Analog memory . Variable resistance . AD and DA conversion . Load resistance . Circuit switching, redundant circuits or the like . Product information memory signatures . Volatile memory backup . Others*
BH BH00
MANUFACTURING METHODS
BH01 BH02 BH03 BH04 BH05 BH06 BH07 BH08 BH09 BH10
. Insulation film formation . . CVD . . Thermal oxidation . . Tunnel insulation film formation . . Nitride film formation . . . Thermal nitridation . Diffusion . . Double diffusion . Ion implantation . . Trap formation by ion implantation
BH11 BH12 BH13 BH14 BH15 BH16 BH17 BH18 BH19
. Epitaxial . . Molecular beam epitaxial, MOCVD, or the like . Etching . . Dry etching (Isotropic etching) . . Wet etching (Anisotropic etching) . Heat treatment . Hydrogen treatment . Vacuum treatment and pressure treatment . Self alignment, see BB05
BH21 BH23 BH26 BH30
. Simultaneous formation of peripheral elements, see BD21 . Multilayer wiring technology . Test aging . Others*
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