FI (list display)

  • G06F7/00
  • Methods or arrangements for processing data by operating upon the order or content of the data handled (logic circuits H03K 19/00) HB CC 5B132
  • G06F7/02
  • .Comparing digital values () HB CC 5B132
  • G06F7/02,630
  • ..adaptation, e.g. self study HB CC 5B132
  • G06F7/02,660
  • ..amplitude comparison, i.e. to determine relative order of operand based on its value, e.g. window comparator HB CC 5B132
  • G06F7/04
  • ..Identity comparison, i.e. for like or unlike values HB CC 5B132
  • G06F7/06
  • .Arrangements for sorting, selecting, merging, or comparing data on individual record carriers HB CC 5B132
  • G06F7/08
  • ..Sorting, i.e. grouping record carriers in numerical or other ordered sequence according to the classification of at least some of the information they carry (by merging two or more sets of carriers in ordered sequence G06F 7/16) HB CC 5B132
  • G06F7/10
  • ..Selecting, i.e. obtaining data of one kind from those record carriers which are identifiable by data of a second kind from a mass of ordered or randomly-distributed record carriers HB CC 5B132
  • G06F7/12
  • ...with provision for printing-out a list of selected items HB CC 5B132
  • G06F7/14
  • ..Merging, i.e. combining at least two sets of record carriers each arranged in the same ordered sequence to produce a single set having the same ordered sequence HB CC 5B132
  • G06F7/16
  • ...Combined merging and sorting HB CC 5B132
  • G06F7/20
  • ..Comparing separate sets of record carriers arranged in the same sequence to determine whether at least some of the data in one set is identical with that in the other set or sets HB CC 5B132
  • G06F7/22
  • .Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc HB CC 5B132
  • G06F7/24
  • ..Sorting, i.e. extracting data from one or more carriers, re-arranging the data in numerical or other ordered sequence, and re-recording the sorted data on the original carrier or on a different carrier or set of carriers (G06F 7/36 takes precedence) HB CC 5B132
  • G06F7/24@A
  • Sorting in general HB CC 5B132
  • G06F7/24@B
  • .Sorting by detecting maximum values one by one (Detecting maximum values G 06 F 7/02@ M) HB CC 5B132
  • G06F7/24@C
  • .Sorting by inserting data to aligned positions HB CC 5B132
  • G06F7/24@D
  • .Sorting by replacing two data HB CC 5B132
  • G06F7/24@E
  • .Pipeline sorters HB CC 5B132
  • G06F7/24@F
  • .Sorting consisting of one-dimensional array structure of the same comparison units HB CC 5B132
  • G06F7/24@H
  • .Sorting using binary trees HB CC 5B132
  • G06F7/24@J
  • .Sorting with memory addresses or pointers HB CC 5B132
  • G06F7/24@K
  • .Converting or processing sorting keys HB CC 5B132
  • G06F7/24@L
  • .Sorting with plurality of sorting keys HB CC 5B132
  • G06F7/24@Z
  • Others HB CC 5B132
  • G06F7/26
  • ...the sorted data being recorded on the original record carrier within the same space in which the data had been recorded prior to their sorting, without using intermediate storage HB CC 5B132
  • G06F7/32
  • ..Merging, i.e. combining data contained in ordered sequence on at least two record carriers to produce a single carrier or set of carriers having all the original data in the ordered sequence (G06F 7/36 takes precedence) HB CC 5B132
  • G06F7/36
  • ..Combined merging and sorting HB CC 5B132
  • G06F7/38
  • .Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation [3] HB CC 5B116
  • G06F7/38,510
  • ..using quantum bit HB CC 5B116
  • G06F7/38,610
  • ..using components for low temperature use, e.g. Josephson gate HB CC 5B116
  • G06F7/38,630
  • ..using magnetism or similar elements (using parametric or other resonance circuit G06F7/38,680) HB CC 5B116
  • G06F7/38,650
  • ...Magnetic bubbles HB CC 5B116
  • G06F7/38,680
  • ..usig other devices such as electrochemical, micro wave, surface acoustic wave, neuristor, electronics beam switch, resonance, e.g. parametrics, ferro-resonance HB CC 5B116
  • G06F7/40
  • ..using contact-making devices, e.g. electromagnetic relay (G06F 7/46 takes precedence) HB CC 5B116
  • G06F7/42
  • ...Adding; Subtracting HB CC 5B116
  • G06F7/44
  • ...Multiplying; Dividing HB CC 5B116
  • G06F7/46
  • ..using electromechanical counter-type accumulators HB CC 5B116
  • G06F7/48
  • ..using non-contact-making devices, e.g. tube, solid state device; using unspecified devices [3] HB CC 5B116
  • G06F7/48@A
  • Using vacuum tubes HB CC 5B116
  • G06F7/48@B
  • using charge transfer elements HB CC 5B116
  • G06F7/48@D
  • Using diodes HB CC 5B116
  • G06F7/48@Z
  • Others HB CC 5B116
  • G06F7/48,510
  • ...Processing or complementing negative numbers HB CC 5B116
  • G06F7/48,520
  • ...Calculating invariable HB CC 5B116
  • G06F7/483
  • ...Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system orfloating-point numbers [8] HB CC 5B116
  • G06F7/485
  • ....Adding; Subtracting [8] HB CC 5B116
  • G06F7/487
  • ....Multiplying; Dividing [8] HB CC 5B116
  • G06F7/49
  • ...Computations with a radix, other than binary, 8, 16 or decimal, e.g. ternary, negative or imaginary radices, mixed radix [3] HB CC 5B116
  • G06F7/49,510
  • ....Computing time HB CC 5B116
  • G06F7/49,520
  • ....Computations using negative radices HB CC 5B116
  • G06F7/491
  • ...Computations with decimal numbers [8] HB CC 5B116
  • G06F7/492
  • ....using a binary weighted representation within each denomination [8] HB CC 5B116
  • G06F7/493
  • .....the representation being the natural binary coded representation, i.e. 8421-code [8] HB CC 5B116
  • G06F7/494
  • ......Adding; Subtracting [8] HB CC 5B116
  • G06F7/495
  • .......in digit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other [8] HB CC 5B116
  • G06F7/496
  • ......Multiplying; Dividing [8] HB CC 5B116
  • G06F7/498
  • ....using counter-type accumulators [8] HB CC 5B116
  • G06F7/499
  • ...Denomination or exception handling, e.g. rounding, overflow [8] HB CC 5B116
  • G06F7/499,101
  • ....processing decimal-points, e.g. normalising, justifying or converting between floating and fixed points HB CC 5B116
  • G06F7/499,605
  • ....exception handling HB CC 5B116
  • G06F7/499,610
  • .....overflow or underflow HB CC 5B116
  • G06F7/499,647
  • ....Rounding HB CC 5B116
  • G06F7/50
  • ...Adding; Subtracting (G06F 7/483-G06F 7/491, G06F 7/544-G06F 7/556 take precedence) [3,8] HB CC 5B116
  • G06F7/501
  • ....Half or full adders, i.e. basic adder cells for one denomination [8] HB CC 5B116
  • G06F7/502
  • .....Half adders; Full adders consisting of two cascaded half adders [8] HB CC 5B116
  • G06F7/503
  • .....using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal [8] HB CC 5B116
  • G06F7/504
  • ....in bit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other [8] HB CC 5B116
  • G06F7/505
  • ....in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination [8] HB CC 5B116
  • G06F7/505,510
  • ....Variable length HB CC 5B116
  • G06F7/505,520
  • ....Subtractions HB CC 5B116
  • G06F7/506
  • .....with simultaneous carry generation for, or propagation over, two or more stages [8] HB CC 5B116
  • G06F7/507
  • ......using selection between two conditionally calculated carry or sum values [8] HB CC 5B116
  • G06F7/508
  • ......using carry look-ahead circuits [8] HB CC 5B116
  • G06F7/509
  • .....for multiple operands, e.g. digital integrators [8] HB CC 5B116
  • G06F7/52
  • ...Multiplying; Dividing (G06F 7/483-G06F 7/491, G06F 7/544-G06F 7/556 take precedence) [3,8] HB CC 5B116
  • G06F7/523
  • ....Multiplying only [8] HB CC 5B116
  • G06F7/525
  • .....in serial-serial fashion, i.e. both operands being entered serially (G06F 7/533 takes precedence) [8] HB CC 5B116
  • G06F7/527
  • .....in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel (G06F 7/533 takes precedence) [8] HB CC 5B116
  • G06F7/53
  • .....in parallel-parallel fashion, i.e. both operands being entered in parallel (G06F 7/533 takes precedence) [8] HB CC 5B116
  • G06F7/533
  • .....Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even [8] HB CC 5B116
  • G06F7/533,510
  • ......using log-sum HB CC 5B116
  • G06F7/533,620
  • ......skipping continuation of 0 or 1, e.g. using Booth algorithm HB CC 5B116
  • G06F7/535
  • ....Dividing only [8] HB CC 5B116
  • G06F7/535,510
  • .....using multiplying or dividing HB CC 5B116
  • G06F7/535,520
  • .....using reciprocal numbers HB CC 5B116
  • G06F7/537
  • .....Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher (SRT) algorithm [8] HB CC 5B116
  • G06F7/544
  • ...for evaluating functions by calculation HB CC 5B130
  • G06F7/544@A
  • Differentiating or integrating calculations HB CC 5B130
  • G06F7/544@F
  • Fuzzy calculations HB CC 5B130
  • G06F7/544@Z
  • Others HB CC 5B130
  • G06F7/548
  • ....Trigonometric functions; Co-ordinate transformations [3] HB CC 5B130
  • G06F7/548@A
  • Trigonometric functions HB CC 5B130
  • G06F7/548@B
  • Converting coordinates HB CC 5B130
  • G06F7/548@Z
  • Others HB CC 5B130
  • G06F7/552
  • ....Powers or roots [3] HB CC 5B130
  • G06F7/552@A
  • Powers HB CC 5B130
  • G06F7/552@B
  • Roots HB CC 5B130
  • G06F7/552@Z
  • Others HB CC 5B130
  • G06F7/556
  • ....Logarithmic or exponential functions [3] HB CC 5B130
  • G06F7/556@A
  • Logarithmic functions HB CC 5B130
  • G06F7/556@B
  • Exponential functions HB CC 5B130
  • G06F7/556@Z
  • Others HB CC 5B130
  • G06F7/57
  • ...Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F 7/483-G06F 7/556or for performing logical operations [8] HB CC 5B116
  • G06F7/57,202
  • ....Arithmetic and control, e.g. address generation, conditional operating or condition flags HB CC 5B116
  • G06F7/57,203
  • ....Selection of data paths in processors, e.g. buslines, register access controls or selectors HB CC 5B116
  • G06F7/57,204
  • ....characterized by logical configuration, e.g. ALU array, reconfigurable device HB CC 5B116
  • G06F7/575
  • ....Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry [8] HB CC 5B116
  • G06F7/58
  • .Random or pseudo-random number generators [3] HB CC 5B171
  • G06F7/58,620
  • ..pseudo-random number generators HB CC 5B171
  • G06F7/58,640
  • ...using finite field arithmetics, e.g. Linear feedback shift register HB CC 5B171
  • G06F7/58,660
  • ...using algorithm in integral number, e.g. using linear congruential method HB CC 5B171
  • G06F7/58,680
  • ..random number generators, i.e. based on atural stochastic process HB CC 5B171
  • G06F7/60
  • .Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations [3] HB CC 5B171
  • G06F7/60,620
  • ..using delta-sigma modulation HB CC 5B171
  • G06F7/62
  • ..Performing operations exclusively by counting total number of pulses [3] HB CC 5B171
  • G06F7/62@A
  • Adding or subtracting HB CC 5B171
  • G06F7/62@B
  • Multiplying or dividing in general HB CC 5B171
  • G06F7/62@C
  • .Multiplying HB CC 5B171
  • G06F7/62@D
  • .Dividing HB CC 5B171
  • G06F7/62@E
  • .Converting HB CC 5B171
  • G06F7/62@F
  • Powers or roots HB CC 5B171
  • G06F7/62@G
  • For using clocks HB CC 5B171
  • G06F7/62@Z
  • Others HB CC 5B171
  • G06F7/64
  • ..Digital differential analysers, i.e. computing devices for differentiation, integration or solving differential or integral equations, using pulses representing increments; Other incremental computing devices for solving difference equations (G06F 7/70 takes precedence; differential analysers using hybrid computing techniques G06J 1/02) [3] HB CC 5B171
  • G06F7/66
  • ...wherein pulses represent unitary increments only [3] HB CC 5B171
  • G06F7/68
  • ..using pulse rate multipliers or dividers (G06F 7/70 takes precedence) [3] HB CC 5B171
  • G06F7/70
  • ..using stochastic pulse trains, i.e. randomly occurring pulses the average pulse rates of which represent numbers [3] HB CC 5B171
  • G06F7/72
  • ..using residue arithmetic [3] HB CC 5B171
  • G06F7/74
  • .Selecting or encoding within a word the position of one or more bits having a specified value, e.g. most or least significant one or zero detection, priority encoders [8] HB CC 5B116
  • G06F7/76
  • .Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data [8] HB CC 5B116
  • G06F7/76,102
  • ..processing variable-length words HB CC 5B116
  • G06F7/78
  • ..for changing the order of data flow, e.g. matrix transposition, LIFO buffers; Overflow or underflow handling therefor [8] HB CC 5B116
    TOP